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Institution

Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
01 May 1997
TL;DR: In this paper, the stencil and preform are aligned over the substrate to be bumped so that the preform aligns with a metal pad on the substrate, and the solder within the openings of a stencil is drawn onto the metal pad.
Abstract: Solder bumps are formed on a substrate, such as a semiconductor die (28) or wafer, using a screen printing and reflow operation. Solder paste (18) is screened into openings (14) of a stencil (10). The paste is reflowed within the stencil to produce a solder preform (22). The stencil and solder preforms are then aligned over the substrate to be bumped so that the preform aligns with a metal pad (30) on the substrate. The solder preforms are again reflowed, and the solder within the openings of the stencil is drawn onto the metal pad. To facilitate the transfer of the solder from the stencil to the metal pad, a second stencil (12) can be used to form a protrusion (27) on the solder preform. The protrusion contacts the metal pad during the transfer reflow operation to facilitate removing the solder from the stencil.

57 citations

Patent
05 Feb 1996
TL;DR: A method and apparatus for moving data in a parallel processing system is described in this article, where a single instruction accesses one significant bit of information from each element in processing element array (80) and combines these bits into one designated element in global register file (50).
Abstract: A method and apparatus for moving data in a parallel processing system (3). In one embodiment, a single instruction accesses one significant bit of information from each element in processing element array (80) and combines these bits into one designated element in global register file (50). The ordering of bits in vectors of global register file (50) associates each bit with an element of processing element array (80). Another single instruction distinguishes significant bit information from a particular vector in global register file (50) and transfers that information to an associated bit in storage circuits associated with each element in processing element array (80).

57 citations

Patent
25 Jul 2006
TL;DR: In this paper, the thermal conductors may be bond wires or conductive stud bumps and do not extend beyond a lateral edge of the die, while active bond pads may be placed exclusively along the die's periphery or also included within the interior of a die.
Abstract: A semiconductor package (10) uses a plurality of thermal conductors (56-64) that extend upward within an encapsulant (16) from one or more thermal bond pads (22, 24, 26) on a die (14) to disperse heat. The thermal conductors may be bond wires or conductive stud bumps and do not extend beyond a lateral edge of the die. One or more of the thermal conductors may be looped within the encapsulant and exposed at an upper surface of the encapsulant. In one form a heat spreader (68) is placed overlying the encapsulant for further heat removal. In another form the heat spreader functions as a power or ground terminal directly to points interior to the die via the thermal conductors. Active bond pads may be placed exclusively along the die's periphery or also included within the interior of the die.

57 citations

Patent
05 Aug 2003
TL;DR: In this article, the voltage switch point of the inverter circuit has a constant voltage offset from one of the nodes, and when a filtered voltage level from the filter circuit crosses the voltage switching point, it signals an electrostatic discharge (ESD) event.
Abstract: A transient detection circuit which may be used in an electrostatic discharge (ESD) clamp circuit. The transient detection circuit includes a filter circuit and an inverter circuit. The voltage switch point of the inverter circuit has a constant voltage offset from one of the nodes. When a filtered voltage level from the filter circuit crosses the voltage switch point of the inverter circuit (indicative of an ESD event), the inverter circuit provides a signal indicating an ESD event.

56 citations

Patent
06 Jul 1993
TL;DR: In this article, an integral heat diffuser is used to distribute the heat generated by the component throughout the thermally conductive material, thereby eliminating the hot spot over the component, resulting in a substantially lower surface temperature.
Abstract: An encapsulated electronic component having an integral heat diffuser. The heat producing electronic component (10) is mounted on a substrate carrier (12) and a layer of encapsulant material (16) covers the component. A layer of thermally conductive material (18) is applied over the encapsulant material, and then a second layer of encapsulant material (20) is applied over the thermally conductive material. The heat generated by the component is distributed throughout the thermally conductive material, thereby eliminating the hot spot over the component, resulting in a substantially lower surface temperature.

56 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267