Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Optimal resource allocation in uplink SC-FDMA systems

Abstract: We present algorithms for resource allocation in Single Carrier Frequency Division Multiple Access (SC-FDMA) systems, which is the uplink multiple access scheme considered in the Third Generation Partnership Project-Long Term Evolution (3GPP-LTE) standard. Unlike the well-studied problem of Orthogonal Frequency Division Multiple Access (OFDMA) resource allocation, the "subchannel adjacency" restriction, whereby users can only be assigned multiple subchannels that are adjacent to each other, makes the problem much harder to solve. We present a novel reformulation of this problem as a pure binary-integer program called the set partitioning problem, which is a well studied problem in operations research. We also present a greedy heuristic algorithm that approaches the optimal performance in cases of practical interest. We present simulation results for 3GPP-LTE uplink scenarios.

Method for treating a semiconductor surface to form a metal-containing layer

Abstract: A method for treating a semiconductor surface to form a metal-containing layer includes providing a semiconductor substrate having an exposed surface. The exposed surface of the semiconductor substrate is treated by forming one or more metals overlying the semiconductor substrate but not completely covering the exposed surface of the semiconductor substrate. The one or more metals enhance nucleation for subsequent material growth. A metal-containing layer is formed on the exposed surface of the semiconductor substrate that has been treated. The treatment of the exposed surface of the semiconductor substrate assists the metal-containing layer to coalesce. In one embodiment, treatment of the exposed surface to enhance nucleation may be performed by spin-coating, atomic layer deposition (ALD), physical layer deposition (PVD), electroplating, or electroless plating. The one or more metals used to treat the exposed surface may include any rare earth or transition metal, such as, for example, hafnium, lanthanum, etc.

A Load Adaptive Control Approach for a Zero-Voltage-Switching DC/DC Converter Used for Electric Vehicles

Abstract: This paper presents a load adaptive control approach to optimally control the amount of reactive current required to guarantee zero-voltage switching (ZVS) of the converter switches. The proposed dc/dc converter is used as a battery charger for an electric vehicle (EV). Since this application demands a wide range of load variations, the converter should be able to sustain ZVS from full-load to no-load condition. The converter employs an asymmetric auxiliary circuit to provide the reactive current for the full-bridge semiconductor switches, which guarantees ZVS at turn-on times. The proposed control scheme is able to determine the optimum value of the reactive current injected by the auxiliary circuit in order to minimize extra conduction losses in the power MOSFETs, as well as the losses in the auxiliary circuit. In the proposed approach, the peak value of the reactive current is controlled by controlling the switching frequency to make sure that there is enough current to charge and discharge the snubber capacitors during the deadtime. In addition, some practical issues of this application (battery charger for an EV) are discussed in this paper. Experimental results for a 2-kW dc/dc converter are presented. The results show an improvement in efficiency and better performance of the converter.

Circuit device with at least partial packaging and method for forming

Abstract: In one embodiment, circuit device (15) is placed within an opening of a conductive layer (10) which is then partially encapsulated with an encapsulant (24) so that the active surface of the circuit device (15) is coplanar with the conductive layer (10). In this embodiment, at least a portion of the conductive layer (10) may be used as a reference voltage plane (e.g. a ground plane). In one embodiment, circuit device (115) is placed on a conductive layer (100) such that an active surface of circuit device (115) is between conductive layer (100) and an opposite surface of circuit device (115). In this embodiment, conductive layer (100) has at least one opening (128) to expose the active surface of circuit device (115). The encapsulant (24, 126, 326) may be electrically conductive for some embodiments, and electrically non-conductive for other embodiments.