Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Ultrawide bandwidth system and method for fast synchronization using multiple detection arms

Abstract: A system and method for fast synchronization of an incoming signal with a UWB receiver rapidly. The present invention synchronizes with a UWB receiver with an incoming signal. The present invention correlates a local pulse generated at the receiver with the incoming signal, finds a phase angle in the correlation function that would correspond to a high signal to noise ratio, thereby matching the receiver to the incoming signal phase, and operates the receiver at that phase. Exemplary options of fast synchronization include using multiple detection arms to compare one parameter of the correlation function to a predetermined threshold.

Integrated circuit package formation

Abstract: Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.

Methodology for Development of High-κ Stacked Gate Dielectrics on III–V Semiconductors

Abstract: A comprehensive methodology for the development of gate dielectrics on III–V semiconductors is presented. This methodology has been motivated by the tremendous difficulties encountered during the development of gate dielectrics on GaAs. The understanding that modern gate dielectrics are typically layered structures with the immediate dielectric/semiconductor interface having substantially different (and often mutually exclusive) requirements compared to the bulk of the dielectric film in terms of materials, manufacturing, and suitable characterization techniques, is at the core of the proposed methodology. While capacitor-based characterization methods such as capacitance-voltage measurements which require to maintain quasi-equilibrium in the semiconductor remain an essential component, non-equilibrium techniques such as photoluminescence intensity have become a necessary ingredient. The application of the proposed methodology has led to high-κ stacked gate oxides on GaAs displaying a broad minimum of interface state density D it ≤ 2 × 1011 cm−2 eV−1 on n-type GaAs suggesting a U-shaped D it distribution, an oxide relative dielectric constant of 20.8 ± 1, a breakdown field exceeding 4 MV/cm, and leakage currents of ≅ 2 × 10−8 A/cm2 at an electric field of 1 MV/cm (SiO2 equivalent field = 5.3 MV/cm). Potential extensions of the proposed methodology to high-κ gate dielectric development on elemental semiconductors such as Si and Ge and wide bandgap semiconductors such as GaN are further discussed.

Debugging sequential circuits using Boolean satisfiability

Abstract: Logic debugging of today's complex sequential circuits is an important problem. In this paper, a logic debugging methodology for multiple errors in sequential circuits with no state equivalence is developed. The proposed approach reduces the problem of debugging to an instance of Boolean satisfiability. This formulation takes advantage of modern Boolean satisfiability solvers that handle large circuits in a computationally efficient manner. An extensive suite of experiments with large sequential circuits confirm the robustness and efficiency of the proposed approach. The results further suggest that Boolean satisfiability provides an effective platform for sequential logic debugging.

Integration of two memory types on the same integrated circuit

Abstract: Both a non-volatile memory (NVM) and a dynamic nanocrystal memory (DNM) are integrated on a semiconductor substrate. Control gates and control dielectrics with embedded nanocrystals or discrete storage elements are formed over differing thicknesses of tunnel dielectrics to form the two memories. Source and drain regions are formed within the semiconductor substrate adjacent to the tunnel dielectrics. Various methods can be used to form a thin tunnel oxide and a thick tunnel oxide by adding minimum processing steps.