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Institution

Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
09 Aug 1993
TL;DR: In this paper, a method and apparatus for generating pseudo-random numbers or for performing data compression in a data processor is presented, which is used to provide scan input data bits during BIST scan testing.
Abstract: A method and apparatus for generating pseudo-random numbers or for performing data compression in a data processor (12). In one form, the present invention generates pseudo-random numbers which are used to provide scan input data bits during built-in-self-test (BIST) scan testing. The present invention then performs data compression on the scan output data received back from the circuits under test (73-75). In one embodiment, the BIST scan testing of data processor (12) is performed in a special "background self-test mode". Central processing unit (CPU) 20 is used to generate the pseudo-random numbers and to perform the data compression. CPU 20 also functions as a standard CPU when in a normal operating mode.

61 citations

Proceedings ArticleDOI
01 Dec 2008
TL;DR: In this article, a 0.1 mum2 6T-SRAM cell with high-NA immersion lithography and state-of-the-art 300 mm tooling is presented.
Abstract: We demonstrate 22 nm node technology compatible, fully functional 0.1 mum2 6T-SRAM cell using high-NA immersion lithography and state-of-the-art 300 mm tooling. The cell exhibits a static noise margin (SNM) of 220 mV at Vdd=0.9 V. We also present a 0.09 mum2 cell with SNM of 160 mV at Vdd=0.9 V demonstrating the scalability of the design with the same layout. This is the world's smallest 6T-SRAM cell. Key enablers include band edge high-kappa metal gate stacks, transistors with 25 nm gate lengths, thin spacers, novel co-implants, advanced activation techniques, extremely thin silicide, and damascene copper contacts.

61 citations

Patent
10 May 2000
TL;DR: In this article, the authors describe a new type of memory bank that includes bit lines (21-24 ), a reference line (27, 28), and digit lines (25, 26), where a plurality of magnetic memory cells are arrayed.
Abstract: An MRAM device has a new type of memory bank ( 10 ) that includes bit lines ( 21-24 ), a reference line ( 27 ) and digit lines ( 25, 26 ), on intersections of bit lines and digit lines a plurality of magnetic memory cells ( 15-18 ) are arrayed. Bit lines are formed on both sides of the reference line on a substrate. Since each bit line is fabricated closely to the reference line, each cell has substantially the same hysteresis characteristics, which allow the MRAM device to provide a steady operation mode.

61 citations

Patent
22 Dec 1993
TL;DR: In this article, a phase lock loop (PLL) frequency synthesizer is used in a radiotelephone to provide a reference frequency to a transmitter or a receiver, which is used to provide two correction signals (409', 415') and provide a single control signal for the VCO (voltage controlled oscillator) (423).
Abstract: A phase lock loop (PLL) frequency synthesizer is used in a radiotelephone to provide a reference frequency to a transmitter or a receiver. This particular PLL frequency synthesizer has a wide bandwidth control loop having a high current charge pump (417) and a narrow bandwidth control loop having a low current charge pump (411). A deadzone circuit (413) is used at an output of a phase detector (405) to control the application of an error signal to the high current charge pump (417). Additionally, the PLL frequency synthesizer utilizes a loop filter (419). The loop filter (419) receives two correction signals (409', 415') and provides a single control signal for the VCO (voltage controlled oscillator) (423). The loop filter contains two time constants formed from resistive and capacitive elements. The two time constants control the bandwidth of the two control loops.

61 citations

Journal ArticleDOI
01 Nov 2006
TL;DR: The measured differential gain is 20 dB with a 3-dB bandwidth of more than 84 GHz, which is the highest bandwidth reported so far for broadband SiGe bipolar amplifiers.
Abstract: This paper reports on the design, fabrication, and characterization of a lumped broadband amplifier in SiGe bipolar technology. The measured differential gain is 20 dB with a 3-dB bandwidth of more than 84 GHz, which is the highest bandwidth reported so far for broadband SiGe bipolar amplifiers. The resulting gain bandwidth product (GBW) is more than 840 GHz. The amplifier consumes a power of 990 mW at a supply of -5.5 V.

61 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267