Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

The role of copper in ZnO/Cu/ZnO thin films for flexible electronics

Abstract: ZnO/Cu/ZnO multilayer structures with very high conductivity have been obtained by magnetron sputtering. The Hall resistivity of the films was as low as 6.9×10−5 Ω-cm with a carrier concentration of 1.2×1022 cm−3 at the optimum copper layer thickness. The conduction mechanism has been explained in terms of metal to oxide carrier injection at low copper thickness and metal layer conduction at higher Cu thicknesses. The peak transmittance of the films is 88% and the photopic averaged transmittance is 75%. Optical transmission behavior of the films involves absorption by copper due to d-band to Fermi-surface transitions at short wavelengths and reflectance combined with scattering losses at long wavelengths. A Burstein–Moss shift in the band gap of the films is seen to take place with increase in thickness of the copper layer. The Haacke figure of merit has been calculated for the films with the best value being 8.7×10−3 Ω−1. Pole figure results reveal that the copper midlayer acts as a hindrance to (002) Zn...

Semiconductor component and method of manufacturing same

Abstract: A semiconductor component includes a first semiconductor region (110, 210) having a first conductivity type and a second semiconductor region (120, 220) above the first semiconductor region and having a second conductivity type. The semiconductor component further comprises a third semiconductor region (130, 230) above the second semiconductor region and having the first conductivity type, a fourth semiconductor region (140, 240) above the third semiconductor region and having the second conductivity type, a fifth semiconductor region (150, 250) above the third semiconductor region and having the first conductivity type, a sixth semiconductor region (160, 260) substantially enclosed within the fifth semiconductor region and having the second conductivity type, and a seventh semiconductor region (170, 270) above the first semiconductor region and having the second conductivity type. The seventh semiconductor region is adjacent to the third and fourth semiconductor regions, and is separated from the fifth semiconductor region.

Method and apparatus for integrated circuit design verification

Abstract: A method for verifying an integrated circuit design using constraint information to develop a weighted data structure. In one embodiment, a binary decision diagram (BDD) includes a plurality of nodes ( 401, 402, 403, 404, 405, 406, 407, 420, and 430 ) representing signals and states in the circuit, and each node has a branching probability based on user-defined weights. The BDD represents the intersection of the input space and state space which satisfies the constraints. Current state information resulting from simulation is used to dynamically adjust the branching probabilities of the BDD on the fly. In one embodiment, the constraint information is applicable for formal verification of a portion of the circuit. In another embodiment, a simulation controller ( 12 ) receives design and constraint information and generates the program to control simulator ( 14 ).

Architecture and implementation of a vector/SIMD multiply-accumulate unit

Abstract: This work presents 64-bit fixed-point vector multiply-accumulator (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 64/spl times/64, two 32/spl times/32, four 16/spl times/16, or eight 8/spl times/8 bit signed/unsigned multiply using essentially the same hardware as a scalar 64-bit MAC and with only a small increase in delay. The scalar MAC architecture is "vectorized" by inserting mode-dependent multiplexing into the partial product generation and by inserting mode-dependent kills in the carry chain of the reduction tree and the final carry-propagate adder. This is an example of "shared segmentation" in which the existing scalar structure is segmented and then shared between vector modes. The vector MAC is area efficient and can be fully pipelined, which makes it suitable for high-performance processors and, possibly, dynamically reconfigurable processors. The "shared segmentation" method is compared to an alternative method, referred to as the "shared subtree" method, by implementing vector MAC designs using two different technologies and three different vector widths.

Novel MBMS user detection scheme for 3GPP LTE

Abstract: An MBMS user detection system and methodology ( 300 ) is provided for advertising available MBMS services by multiplexing user feedback requests ( 303 ) using time, frequency and/or code diversity so that one or more MBMS service users can be detected in a single polling time interval. Available MBMS services are assembled into a user feedback request ( 302 ) and assigned unique multiplex signaling codes so that a code for a first MBMS service ( 302.1 ) is orthogonal to a code for a second MBMS service ( 302. k ). In addition, a queuing model ( 610 ) is provided for analyzing and optimizing how services are advertised in the user feedback requests.