Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Micro-electromechanical system device

Abstract: A Micro-Electromechanical Systems (MEMS) device (100) having conductively filled vias (141). A MEMS component (124) is formed on a substrate (110). The substrate has conductively filled vias (140) extending therethrough. The MEMS component (124) is electrically coupled to the conductively filled vias (140). The MEMS component (124) is covered by a protective cap (150). An electrical interconnect (130) is formed on a bottom surface of the substrate (110) for transmission of electrical signals to the MEMS component (124), rather than using wirebonds.

Charge storage structure formation in transistor with vertical channel region

Abstract: A semiconductor device includes a semiconductor structure having a first sidewall. A vertical channel region is formed in the semiconductor structure along the first sidewall between a first current electrode region and a second current electrode region. First and second charge storage structures are formed adjacent to the first sidewall in openings of a dielectric layer. The first and second charge storage structures are electrically isolated from each other and from the semiconductor structure. A control electrode is formed adjacent to the first sidewall. In another embodiment, third and fourth charge storage structures may be formed adjacent to a second sidewall of the semiconductor structure in openings of a dielectric layer.

Smart Modeling of Microwave Devices

Abstract: Modeling and computer-aided design (CAD) techniques are essential for microwave design, especially with the drive towards first-pass design success. We have described neural networks for microwave modeling and design. Neural networks are suitable when modeling a required relationship for which analytical formulas are hard to derive, or for which the computational effort is too high. This relationship can be either of the IO relationship of the overall model (straight neural network model), the output-input relationship (inverse model), a relationship between existing model and desired data (neuro-SM), or relationship of a subpart of the overall model (knowledge based neural network). Neural networks are fast to evaluate, and the neural network formulas are easy to implement into microwave CAD. The simplicity of adding input neurons or hidden neurons makes neural network flexible in handling functions of different dimensions and of different degree of nonlinearity. We have also demonstrated that neural networks are helpful in developing parametric or scalable models for passive and active microwave devices.

Optimal Downlink OFDMA Resource Allocation with Linear Complexity to Maximize Ergodic Rates

Abstract: OFDMA resource allocation assigns subcarriers and power, and possibly data rates, to each user. Previous research efforts to optimize OFDMA resource allocation with respect to communication performance have focused on formulations considering only instantaneous per-symbol rate maximization, and on solutions using suboptimal heuristic algorithms. This paper intends to fill gaps in the literature through two key contributions. First, we formulate continuous and discrete ergodic weighted sum rate maximization in OFDMA assuming the availability of perfect channel state information (CSI). Our formulations exploit time, frequency, and multi-user diversity, while enforcing various notions of fairness through weighting factors for each user. Second, we derive algorithms based on a dual optimization framework that solve the OFDMA ergodic rate maximization problem with O(MK) complexity per OFDMA symbol for M users and K subcarriers, while achieving data rates shown to be at least 99.9999% of the optimal rate in simulations based on realistic parameters. Hence, this paper attempts to demonstrate that OFDMA resource allocation problems are not computationally prohibitive to solve optimally, even when considering ergodic rates.

Inverse slope isolation and dual surface orientation integration

Abstract: A semiconductor process and apparatus provide a high performance CMOS devices (108, 109) with hybrid or dual substrates by etching a deposited oxide layer (62) using inverse slope isolation techniques to form tapered isolation regions (76) and expose underlying semiconductor layers (41, 42) in a bulk wafer structure prior to epitaxially growing the first and second substrates (84, 82) having different surface orientations that may be planarized with a single CMP process. By forming first gate electrodes (104) over a first substrate (84) that is formed by epitaxially growing (100) silicon and forming second gate electrodes (103) over a second substrate (82) that is formed by epitaxially growing (110) silicon, a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes having improved hole mobility.