Institution
Freescale Semiconductor
About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..
Topics: Layer (electronics), Signal, Transistor, Integrated circuit, Voltage
Papers published on a yearly basis
Papers
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04 Feb 1997TL;DR: In this paper, an electro-mechanical transducer (10) is a field effect transistor (18) having angular velocity sensing capabilities, where a gate electrode (16) is suspended over a channel region (60) of a substrate (31), is biased at a desired potential, and is oscillated along an axis (40).
Abstract: Converting a Coriolis force into an electrical signal, an electro-mechanical transducer (10) is a field effect transistor (18) having angular velocity sensing capabilities. A gate electrode (16) is suspended over a channel region (60) of a substrate (31), is biased at a desired potential, and is oscillated along an axis (40). The gate electrode (16) and the substrate (31) are rotated about a different axis (41) at an angular velocity (44). The resulting Coriolis force displaces the suspended gate electrode (16) along yet another axis (42) which modulates a current (53) in the channel region (60) of the substrate (31). The amplitude of the current (53) describes the magnitude of the angular velocity (44).
41 citations
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19 Apr 2002TL;DR: In this paper, a floating P-type blocking region is provided to protect an N-channel LDMOS field effect transistor from inadvertent reversal of polarity of voltage applied across the device.
Abstract: An LDMOS field effect transistor (80) provides protection against the inadvertent reversal of polarity of voltage applied across the device. To protect an N-channel device, a floating P-type blocking region (82) is provided surrounding the drain region (32). The blocking region (82) is spaced apart from a body region (28) that forms the diffused channel (34) of the transistor (80). A first gate electrode (36) controls the conductivity of the diffused channel (34) and a second gate electrode (84) controls the conductivity of the surface (35) of the blocking region (82).
41 citations
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19 Sep 2005TL;DR: A case study on a complete 16,000-line highly-optimized commercial-grade application, namely an H.264 video decoder, revealed that binary partitioning was indeed competitive, achieving nearly identical 2.5x speedups as source level partitioning, compared to a standard microprocessor.
Abstract: We describe results of a case study whose intent was to determine whether new techniques for hardware/software partitioning of an application's binary are competitive with partitioning at the C source code level. While such competitiveness has been shown previously for standard benchmark suites involving smaller or unoptimized applications, the case study instead focuses on a complete 16,000-line highly-optimized commercial-grade application, namely an H.264 video decoder. The several month study revealed that binary partitioning was indeed competitive, achieving nearly identical 2.5x speedups as source level partitioning, compared to a standard microprocessor. Furthermore, the study revealed that several simple C-level coding modifications, including pass by value-return, function specialization, algorithmic specialization, hardware-targeted reimplementation, global array elimination, hoisting and sinking of error code, and conversion to explicit control flow, could lead to improved application speedups approaching 7x for both source level and binary level partitioning.
41 citations
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TL;DR: In this article, an SEU-tolerant Dual Interlocked Storage Cell (DICE) latch design with both PMOS and NMOS transistors in the feedback paths is presented.
Abstract: This paper presents an SEU-tolerant Dual Interlocked Storage Cell (DICE) latch design with both PMOS and NMOS transistors in the feedback paths. The feedback transistors improve the SEU tolerance by increasing the feedback loop delay during the hold mode. The latch design was implemented in a shift register fashion at a 130-nm bulk CMOS process node. Exposures to heavy-ions exhibited a significantly higher upset LET threshold and lower cross-section compared with the traditional DICE latch design. Performance penalties in terms of write delay, power, and area are non-significant compared to traditional DICE design.
41 citations
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08 Dec 2006TL;DR: In this paper, a deblocking filter circuit is used to disable deblock filtering of video information based on the content characteristic, such as the average of minimum sums of absolute differences of pixel values determined during motion estimation, the mean square error of the video information, or the number of bits used for coding the video content.
Abstract: A method of adaptively disabling deblock filtering of video information including determining a content characteristic of the video information, and adaptively disabling deblock filtering of the video information based on the content characteristic. The content characteristic may be a content complexity, such as an average of minimum sums of absolute differences of pixel values determined during motion estimation, or the mean square error of the video information, or the number of bits used for coding the video content. The content characteristic may be other than complexity, such as motion vector information. A video information processing system including a video processing circuit which processes video information and which determines a content characteristic of the video information, and a deblocking filter circuit which adaptively disables deblock filtering of the video information based on the content characteristic.
41 citations
Authors
Showing all 7673 results
Name | H-index | Papers | Citations |
---|---|---|---|
David Blaauw | 87 | 750 | 29855 |
Krishnendu Chakrabarty | 79 | 996 | 27583 |
Rajesh Gupta | 78 | 936 | 24158 |
Philippe Renaud | 77 | 773 | 26868 |
Min Zhao | 71 | 547 | 24549 |
Gary L. Miller | 63 | 306 | 13010 |
Paul S. Ho | 60 | 475 | 13444 |
Ravi Subrahmanyan | 59 | 353 | 14244 |
Jing Shi | 53 | 222 | 10098 |
A. Alec Talin | 52 | 311 | 12981 |
Chi Hou Chan | 48 | 511 | 9504 |
Lin Shao | 48 | 380 | 12737 |
Johan Åkerman | 48 | 306 | 9814 |
Philip J. Tobin | 47 | 186 | 6502 |
Alexander A. Demkov | 47 | 331 | 7926 |