Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Advanced Packaging: The Redistributed Chip Package

Abstract: The redistributed chip package (RCP) is a substrate-less embedded chip package that offers a low-cost, high performance, integrated alternative to current wirebond ball grid array (BGA) and flip chip BGA packaging. Devices are encapsulated into panels while routing of signals, power, and ground is built directly on the panel. The RCP panel and signal build up lowers the cost of the package by eliminating wafer bumping and substrates thereby enabling large scale assembly in panel form. The build up provides better routing capabilities and better integration. Also, by eliminating bumping, the device interconnect is inherently Pb-free, and the stress of the package is reduced enabling ultra-low-k device compatibility. The panel is created by attaching the device active side down to a substrate, encapsulating and curing the devices, grinding to desired thickness, and then removing the substrate. Signal, power, and ground planes are created using redistribution-like processing. Multilayer metal RCP packages have passed 40 to 125 C air-to-air thermal cycling and HAST after MSL3/260 preconditioning.

Overvoltage protection device

Abstract: A voltage protection device comprising an integrated circuit associated with a first voltage variable element and a second voltage variable element; wherein the first voltage variable element has a first voltage variable characteristic and the second voltage variable element has a second voltage variable characteristic such that the first voltage variable element and the second voltage variable element have different voltage variable characteristics for allowing the first voltage variable element to provide voltage protection to the integrated circuit at a first voltage and the second voltage variable element to provide voltage protection to the integrated circuit at a second voltage.

Electron transport in Gate-All-Around uniaxial tensile strained-Si nanowire n-MOSFETs

Abstract: The intrinsic performance and electron effective mobility of uniaxially strained-Si gate-all-around (GAA) NanoWire (NW) n-MOSFETs are investigated, for the first time. Suspended strained-Si NWs show very high stress (up to ~2.1 GPA) as confirmed by Raman, with no bending of the wires. GAA strained-Si NW n-MOSFETs exhibit excellent subthreshold swing, and current drive and transconductance enhancement of ~2X over unstrained Si control NW devices. The mobility enhancement of these devices over unstrained planar and GAA MOSFETs as well as their scalability to circular NWs with radius of ~4 nm are also demonstrated.

Data processing system having a protocol timer for autonomously providing time based interrupts

Abstract: A communications system includes multiple processors (14, 16) and a protocol timer (18). The protocol timer (18) controls the timing of events in the communications system and operates autonomously after it is loaded with initial instructions by one of the multiple processors (14, 16). The protocol timer (18) utilizes a frame event table (50) and a macro event table (46, 48) to trigger events and to generate interrupts of the multiple processors (14, 16). By allowing the protocol timer (18) to operate autonomously, the processors (14, 16) are relieved of timing control, and can be powered down when not in use, thus reducing power consumption of the communications system. Also, by using the protocol timer (18) to control the timing of events, software related errors and interrupt latencies are reduced.

Molded ring integrated circuit package.

Abstract: An integrated circuit package (10) is formed to reveal the active circuitry (15) on the die surface. An integrated circuit die (12) is mounted on a die mounting portion (32) of a metal lead frame (30) in such a manner that the die is supported on the lead frame by the perimeter portion of the die. The active circuitry (15) on the die is connected to the various metal frame leads (33) by wire bonds (18) between the bond pads on the die and the metal lead frame. Plastic molding material (50) is then molded to encapsulate the wire bond pads (17), the perimeter of the integrated circuit die (16), the wire bonds (18), a portion of the leads (33), the perimeter portion of the back of the die (22), and the lead frame die mounting portion (32). The plastic material is formed so as to expose the active circuitry on the face of the die and a central portion on the back of the die.