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Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Journal ArticleDOI
TL;DR: In this article, the authors present a transceiver chipset consisting of a four channel receiver (Rx) and a single-channel transmitter (Tx) designed in a 200 GHz SiGe BiCMOS technology.
Abstract: We present a transceiver chipset consisting of a four channel receiver (Rx) and a single-channel transmitter (Tx) designed in a 200-GHz SiGe BiCMOS technology. Each Rx channel has a conversion gain of 19 dB with a typical single sideband noise figure of 10 dB at 1-MHz offset. The Tx includes two exclusively-enabled voltage-controlled oscillators on the same die to switch between two bands at 76-77 and 77-81 GHz. The phase noise is -97 dBc/Hz at 1-MHz offset. On-wafer, the output power is 2 × 13 dBm. At 3.3-V supply, the Rx chip draws 240 mA, while the Tx draws 530 mA. The power dissipation for the complete chipset is 2.5 W. The two chips are used as vehicles for a 77-GHz package test. The chips are packaged using the redistribution chip package technology. We compare on-wafer measurements with on-board results. The loss at the RF port due to the transition in the package results to be less than 1 dB at 77 GHz. The results demonstrate an excellent potential of the presented millimeter-wave package concept for millimeter-wave applications.

94 citations

Patent
04 Mar 1996
TL;DR: In this paper, an integrated electro-optical package (50) including a first light emitting device (LED) display chip (28) and at least one additional LED display chip(30), each composed of an optically transparent substrate (10) with an array (15) of LEDs formed thereon and cooperating to generate a complete image.
Abstract: An integrated electro-optical package (50) including a first light emitting device (LED) display chip (28) and at least one additional LED display chip (30), each composed of an optically transparent substrate (10) with an array (15) of LEDs (12) formed thereon and cooperating to generate a complete image. The LEDs (12) of the first LED display chip (28) are constructed to emit light of a wavelength different than the light emitted by the additional LED display chip(s) (30), thereby creating a different color menu or object bar (156) within the view (150) generated. A mounting substrate (25), having connection pads (32), bump bonded to the pads on the optically transparent substrate (10). A driver substrate (55) having connections to the pads (32) on the mounting substrate (25). A plurality of driver and control circuits (57) connected to the LED display chips (28) and (30) through electrodes on the driver substrate (55). A lens (73) in alignment with the LED display chips (28) and (30) to magnify the complete images and produce an easily viewable virtual image.

94 citations

Journal ArticleDOI
TL;DR: It is shown that the proposed controller is able to eliminate the low bandwidth voltage control loop in the conventional PFC controller, thus allowing the front-end AC/DC boost PFC converter to operate with faster dynamic response than with the conventional controller approach.
Abstract: AC/DC converters used in electric vehicles generally consist of two stages: an input power factor correction (PFC) boost AC/DC stage that converts input AC voltage to an intermediate DC voltage and reduces input current harmonics injected to the grid, and a DC/DC converter that provides high-frequency galvanic isolation. Since there is a low-frequency ripple (second harmonic of the input ac line frequency) in the output voltage of the PFC AC/DC boost converter, the voltage loop in the conventional control system typically has a very low bandwidth to avoid distorting the input current waveform. This causes the conventional PFC controller to have slow dynamics against load variations. This paper presents a new control approach that regulates the input power of the converter instead of the output voltage by using an optimal nonlinear control approach based on the Control-Lyapunov Function (CFL). In this paper, it is shown that the proposed controller is able to eliminate the low bandwidth voltage control loop in the conventional PFC controller, thus allowing the front-end AC/DC boost PFC converter to operate with faster dynamic response than with the conventional controller approach. Experimental results from a 3 kW AC/DC converter are presented in the paper to validate the proposed control method and its superior performance.

93 citations

Journal ArticleDOI
TL;DR: In this paper, a novel interleaved discharging (ID) approach is presented to reduce the output ripple in step-down switched-capacitor (SC) dc-dc converters.
Abstract: Rapidly dropping power supply voltages and tight voltage regulation requirements for integrated circuits challenges power supply designers. A novel interleaved discharging (ID) approach is presented to reduce the output ripple in step-down switched-capacitor (SC) dc-dc converters. Simulation and experimental results of a four-stage SC dc-dc converter show that the ID approach can reduce the output ripple by a factor of three. The proposed approach also improves the converter efficiency by 7%. The ID method provides flexibility in the design optimization of step-down SC dc-dc converters

93 citations

Patent
30 Nov 2005
TL;DR: In this article, a method for packaging a semiconductor device includes forming through holes (12 ) in a base substrate (10 ) and depositing a conductive material (14 ) on the first side (16 ) of the base substrate(10 ) to fill the through holes, the conductive layer is patterned and etched to form interconnect traces and pads.
Abstract: A method for packaging a semiconductor device includes forming through holes ( 12 ) in a base substrate ( 10 ) and depositing a conductive material ( 14 ) on a first side ( 16 ) of the base substrate ( 10 ) to form a conductive layer ( 18 ) such that the conductive material ( 14 ) fills the through holes ( 12 ). The conductive layer ( 18 ) is patterned and etched to form interconnect traces and pads ( 22 ). Conductive supports ( 24 ) are formed on the pads ( 22 ) such that the conductive supports ( 24 ) extend through respective ones of the through holes ( 12 ).

92 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267